Prosjekt: High Density Interconnect

The previous article in this series discussed how a conventional PCB designed to high reliability requirements is incompatible with component packages with very small spacing between solder connections. Ball Grid Arrays (BGA), the dominant package for complex electronic components, feature sub-millimeter pitch driven forth by the consumer segment and their continual need for integration and miniaturization. Feature sizes demanded by high reliability electronic boards (IPC-6011, class 3) precludes use of packages with pitch smaller than 0.8mm using a conventional fabrication process, while popular components are offered with pitch of 0.65mm, 0.4mm and even less. Achieving Class 3 compliance when using these packages is only possible by extending the conventional fabrication process with features collectively known as High Density Interconnect or HDI.

In conventional PCB fabrication, a feature called via accomplishes vertical connection between copper layers of the PCB. Vias are formed when holes drilled through a laminated board are copper plated forming a conductive barrel through the drilled hole. The barrel makes electrical contact to copper pads etched on the various layers and assures connection between them. Mechanically drilled, the holes extend through the entire thickness of the board, and there are practical limits to how small the drill diameter may be. Hole diameters smaller than 0.3mm becomes a cost driver.

Definitions

HDI: Printed circuit board with a higher wiring density per unit area than conventional printed circuit boards (PCB). They have finer lines and spaces (≤ 100 µm), smaller vias (≤ 150 µm), and capture pads (≤ 400 µm), and higher connection pad density (>20pads/cm2) than employed in conventional PCB technology.

Microvia: A blind hole with diameter ( ≤ 150 µm) having a pad diameter ( ≤ 350 µm) formed by either laser or mechanically drilling, wet/dry etching, photo imaging or conductive ink formation followed by a plating operation for product development.

The object of HDI is to achieve higher wiring density than conventional boards, and a central feature of the technology is the microvia, blind vias defined by hole diameters smaller than150µm and normally drilled by laser. The microvia only extends between two, or at most tree layers, and is usually used in combination with buried vias and regular conventional through-hole vias. A prime example of HDI technology is the BGA package itself which is a printed circuit board with extremely small features.

While the fabrication of conventional PCBs are standardized and well known, HDI boards are constructed in a wide variety of ways. IPC’s sectional design standard for HDI (IPC-2226) details 6 general classes of construction from class I where microvias are formed in the surface of a conventional PCB, to type VI in which electrical interconnections and mechanical structure are formed simultaneously. One of the prevalent structures, type III, is shown in the illustration to the right.

HDI Type III structure

A type III HDI structure has two levels of microvias, buried vias and regular through-hole vias. The fabrication process starts with a laminated PCB, which includes plated through-hole vias. Additional dielectric layers and copper foils are added to the board in sequential lamination cycles. After each cycle, small holes are laser drilled and plated to form microvias between pairs of layers. The through hole vias of the original laminated core form the buried vias in the finished structure.

In low-volume segments, microvias were often added to a lay-up when routing a design using a conventional structure proved difficult or impossible. Adding microvias to a given lay-up adds cost, so microvias are often regarded as a cost driver to be avoided if possible. However, designers in the consumer segment use HDI and microvias aggressively to achieve cost reductions.

HDI’s cost saving potential stems from its efficient use of space and area which in turn results in higher routing density. The via structure itself has smaller diameter and consumes less space. The primary advantage, however, comes from the small vertical extension of the microvia, which leaves larger routing channels on other layers. Judiciously employed it allows a reduction of the number of layers in the board for a given circuit, which more than offsets the cost added by the inclusion of microvias.

Published case studies claims PCB cost reductions in the order of 50% by layer reduction (from 18 layer to 10 in some examples), and reduction in overall board area. When shipping millions of boards the savings are well worth the extra effort.

None of this comes easy, however. An entirely different regime is required to make the right design decisions in terms of construction type, material choice, lay-up and the use of the chosen build before board routing may even start. The wider variety of construction types and methods demands close technical contact with a capable board shop or broker up front.

The board must be designed for the process it will be manufactured with, requiring a far deeper understanding of process and materials on the part of the designer than with conventional boards.

Microvias are also used effectively in improving signal and power integrity. Through-hole vias represent small capacitive loads and stubs which may cause a degradation of high-speed signals. Smaller, shorter microvias presents reduced parasitic loads and allows for routing without via stubs. Filled and capped microvias placed directly in component solder lands reduces inductance in the power distribution network. Microvia in pad is advantageous for high speed signaling as well.

Large processor chips may pull several tens of Amperes and experience significant load steps. The grid of large through-hole vias under dense BGAs often perforate the power and ground planes that supply this current to an extent where the flow is restricted. Microvias, with smaller diameter and limited depth, reduces the perforation and helps limit ripple and voltage drops to an acceptable level.

Layer reduction

The escape routing from large BGAs usually determines the number of routing layers required in a complex PCB. Most connections must be channeled directly to an inner layer to be routed out of the BGA area. With a conventional PCB structure, the result is a dense grid of through-hole vias that obstruct the path for nets to escape. With 1mm pitch, only a single trace may pass between two adjacent vias resulting in a massive growth in the layer count as the array grows. HDI allows for smaller track and space, and with fewer vias extending through the board, broader routing channels may be established. The result is a higher routing density and significant reduction of the number of routing layers required.

When a signal must traverse several levels of microvias, vias on subsequent layers may be placed with a small offset, in a staggered fashion. It is, however, also possible to stack them right on top of each other and also on top of buried vias. Stacking microvias is more space efficient and makes for easier routing, but there is a cost in terms of reliability.

A single microvia by itself is the most reliable interconnect structure of all with staggered microvias as a close second. Stacked vias will experience greater thermal stress during the solder reflow process and is generally less reliable than a conventional through-hole via. The buried via is considered the least reliable structure depending on the details of its formation. For high-reliability boards it is advisable to use staggered structures, and to take great care in specifying the buried vias.